Democratizing AI Accelerators for HPC Applications:
Challenges, Success, and Support

Welcome

Recently, there has been a surge in the number of novel AI hardware architectures from companies including Cerebras, Groq, SambaNova, Graphcore, Intel, Tenstorrent, etc. Some of these systems are accessible to the research community through testbeds in the US (e.g. ALCF AI Testbed) and Europe (e.g. EPCC at the University of Edinburgh). Beyond their primary use in AI, these accelerators have sparked intense interest and rapid development in their capacity for handling HPC workloads and driving algorithmic research. Their distinctive architectural designs, often with significant raw compute capability and high bandwidth, have proven capable of significantly enhancing real-world performance for specific workloads, often outperforming GPUs. As these technologies are still emerging, the maturity levels of associated tooling and software stacks vary considerably, and there are gaps in documentation and support.

This BoF aims to explore trends in AI accelerators for HPC, ideal programming models, software stack support, code portability, training resources, and common challenges. This BoF aims to explore several pertinent questions:

What are the prevailing trends in AI accelerators for HPC applications?

How do the different architectures better suit different workloads?

What is the ideal programming model for these accelerators? Are traditional ones like OpenMP, OpenCL, and SYCL suited?

Currently, vendor-specific programming models are used to port applications. What is the best way to enable portability across various AI hardware architectures? What software stack support from the vendors is needed to enable the research community to build higher-level abstractions?

Where can one find robust training resources?

What are the common challenges users encounter with these accelerators?

How can vendors enhance support for developers?

Where can interested users access and experiment with these hardware resources?

Pooling the extensive knowledge within the community, this BoF intends to assemble developers experienced in, or are interested in using AI accelerators for HPC applications. The aim is to foster a community, and engage in discussion, and share challenges, experiences, success stories, and insights gained from using these accelerators. It is also an opportunity for AI accelerator providers (research centers, hardware vendors) to understand the requirements and challenges users face when developing applications on their platforms, and engage in how best to support users. Representatives from the industry will be invited to speak and engage in discussion regarding their HPC software design and support, but they will not influence the vendor-neutral format of the session. We intend to turn this BoF into a series to ensure continual community engagement.