Democratizing AI Accelerators for HPC Applications:
Challenges, Success, and Support

Tuesday, 18 November 2025
5:15pm - 6:45pm CST
Location: 275

held in conjunction with SC25

Welcome

Recently, there has been a surge in the number of novel AI hardware architectures from companies including Cerebras, Groq, Tenstorrent, and others. Some of these systems are accessible to the research community through testbeds in the US (e.g. ALCF AI Testbed) and Europe (e.g. EPCC at the University of Edinburgh). Beyond their primary use in AI, these accelerators have sparked intense interest and rapid development in their capacity for handling HPC workloads and driving algorithmic research. Their distinctive architectural designs, often with significant raw compute capability and high bandwidth, have proven capable of significantly enhancing real-world performance for specific workloads, often outperforming GPUs. As these technologies are still emerging, the maturity levels of associated tooling and software stacks vary considerably, and there are gaps in documentation and support.

View SC25 BoF Page

💡 Topics for Discussion

This BoF aims to explore trends in AI accelerators for HPC, ideal programming models, software stack support, code portability, training resources, and common challenges. We will explore several pertinent questions:

  • What are the prevailing trends in AI accelerators for HPC applications?
  • How do the different architectures better suit different workloads?
  • What is the ideal programming model for these accelerators? Are traditional ones like OpenMP, OpenCL, and SYCL suited?
  • Currently, vendor-specific programming models are used to port applications. What is the best way to enable portability across various AI hardware architectures?
  • What software stack support from the vendors is needed to enable the research community to build higher-level abstractions?
  • Where can one find robust training resources?
  • What are the common challenges users encounter with these accelerators?
  • How can vendors enhance support for developers?
  • Where can interested users access and experiment with these hardware resources?

Agenda

Time Topic
5:15 - 5:20 PM
Welcome & Opening Remarks
5:20 - 6:00 PM ⚡ Flash Talks (4 minutes each)
Title TBD
Felix LeClaire, Tenstorrent [Slides - TBD]
Title TBD
Title TBD
Title TBD
Title TBD
Title TBD
Title TBD
6:00 - 6:30 PM 💬 Panel Discussion
Moderator: Siddhisanket Raskar, PNNL
Panelists:
6:30 - 6:45 PM ❓ Audience Q&A
📄 Slides Coming Soon
Presentation slides will be available after the event. Check back later for updates.

Organizers

Murali Emani
Computer Scientist
Argonne National Laboratory
Siddhisanket Raskar
Data Scientist
Pacific Northwest National Laboratory
Tal Ben-Nun
Computer Scientist
Lawrence Livermore National Laboratory
Nick Brown
Senior Research Fellow
Edinburgh Parallel Computing Centre
Hatem Ltaief
Principal Research Scientist
King Abdullah University of Science & Technology
Sanjif Shanmugavelu
Software Engineer
Groq